An analog-to-digital converter (ADC) takes an analog input signal and converts the input, through a mathematical function, to a digital output signal. The ADC process includes the steps of: 1) sampling an analog signal; 2) quantizing the sampled signal; and 3) digitally encoding the quantized signal. There are many methods for implementing an ADC process as is well known to those of skill in the art.
There are numerous multi-channel ADC applications that utilize a multiplexer (MUX) followed by an ADC or an operational amplifier (op amp) and an ADC. For the proper operation of such data acquisition systems, the MUX control signals must be carefully timed with respect to a control signal which initiates ADC signal acquisition and conversion. Typically, a controller separate from the other components of the data acquisition system was responsible for system timing issues, such as to when to switch channels on the MUX.
Designers of data acquisition systems as described above consider a number of design issues including the optimization of analog signal path performance and control, reducing timing complexity, and improving analog isolation. These have been difficult problems to solve since system designers don't have reliable information as to the'various delays within the system. For example, the controller doesn't have internal information of the ADC, such as when data capture is completed. As a result, system designers build-in additional time between data capture requests from the controller in order to compensate for delays in the system and to ensure sufficient analog signal path slew and settle time. This, in turn, reduces the resolution and capacity of the data acquisition system.
These and other limitations of the prior art will become apparent to those of skill in the art upon a reading of the following descriptions and a study of the several figures of the drawing.